NXP MC9S08JM60CQH - Microcontrolador HCS08, 48 MHz, 60/4 KB, QFP64

11.59 EUR*

Descripción

The MC9S08JM60 series MCUs belong to the cost-effective and powerful HCS08 family of 8-bit microcontroller units (MCUs). microcontroller units (MCUs). All MCUs in the family use the improved HCS08 core and are available available with a variety of modules, memory sizes, memory types and package types. 8-bit HCS08 central processing unit (CPU) - 48-MHz HCS08 CPU (central processing unit) - 24-MHz internal bus frequency - HC08 instruction set with additional BGND instruction - Background debugging system - Breakpoint capability that allows the setting of a single breakpoint setting during in-circuit debugging (plus two additional breakpoints in on-chip debugging). breakpoints in the on-chip debug module) - In-circuit emulator (ICE) debug module with two comparators and nine trigger modes. Eight deep FIFO for storing change-of-flow addresses and event-dependent data. The debug module supports both tag and force breakpoints. - Support for up to 32 interrupt/reset sources Memory options - Up to 60 KB of on-chip in-circuit programmable flash memory Flash memory with block protection and security options Memory options - Up to 4 KB on-chip RAM - 256 bytes USB RAM Peripheral devices - USB - USB 2.0 device with full speed (12 Mbit/s) Controller with dedicated on-chip USB transceiver, 3.3 V regulator and USBDP pull-up resistor; Supports control, interrupt, isochronous and bulk transfers; supports endpoint 0 and up to 6 additional additional endpoints; endpoints 5 and 6 can be be combined to enable double buffering - ADC - 12-channel, 12-bit analog-to-digital converter Converter with automatic comparison function; internal temperature sensor - ACMP - Analog comparator with option for comparison with internal reference; operation in Stop3 mode - SCI - Two serial communication interfaces Modules with optional 13-bit break LIN extensions - SPI - Two 8- or 16-bit selectable serial peripherals Interface modules with one receive data buffer Hardware match function - IIC - Inter-integrated circuit bus module for operation with up to 100 kbps at maximum bus load bus load; multi-master operation; programmable slave address slave address; interrupt-controlled byte-by-byte data transfer; 10-bit addressing transmission; 10-bit addressing and broadcast modes Support for - Timer - One 2-channel and one 6-channel 16-bit timer/pulse width modulator (TPM) Modules: Selectable input capture, output comparison and edge-controlled PWM capability for each channel. each channel. Each timer module can be configured configured for buffered centered PWM (CPWM) on all channels - KBI - 8-pin keyboard interrupt module - RTC - real-time counter with binary or decimal prescaler